1. Field of the Invention
The present invention relates generally to the integration of semiconductor control and power devices, and methods of manufacturing same.
2. Description of the Related Art
Traditionally, discrete and integrated circuit power transistors were fabricated in bipolar form. This was largely due to the fact that bipolar power transistors emerged as a mature technology before the development of MOS Power devices. Power Bipolar devices have proved to be extremely rugged and have large power handling capabilities. The drawback of bipolar power transistors is that they consume large amounts of power to turn the device on and off and are limited to switching speeds of the order of 50 KHz.
Where a low voltage drop across the power device and a low power dissipation are important or a fast switching speed is required the Power DMOS device has several advantages over its Bipolar counterpart. The Power DMOS device requires a lower power to switch the device on and off and contrary to the Bipolar device it does not require a steady state current to keep it switched on. The Power DMOS device is also capable of a lower series resistance than the Bipolar device which is limited in some circuits or modes to an inherent voltage drop of approximately 0.6 volt. The combination of the power drop across the device and the power required to drive the device allows the Power DMOS device to dissipate much less heat than its Bipolar counterpart. The Power DMOS device, being a majority carrier device, switches faster than its Bipolar counterpart and further the switching of its gate is compatible with the voltage available from MOS logic drive. The Power DMOS device also has advantages from a ruggedness point of view. Due to the Power DMOS positive temperature coefficient of on-state resistance in the linear region, lateral thermal instabilities do not occur in contrast to Bipolar devices where localized hot spots can cause current hogging and eventual device thermal runaway and breakdown. See for example, Fong et al, Power DMOS for High-Frequency and Switching Applications, 27 IEEE Tr. Elec. Dev. 322 (1980); Coen et al, A High-Performance Planar Power MOSFET, 27 IEEE Tr. Elec. Dev. 340 (1980); and Sun et al, Modeling of the On-Resistance of LDMOS, VDMOS, and VMOS Power Transistors, 27 IEEE Tr. Elec. Dev. 356 (1980).
Integration of DMOS power structures with either or both bipolar or MOS control circuitry are commonly referred to as smart power or integrated power devices. These devices try to achieve the integration of bipolar and MOS technology, commonly referred to as BiCMOS technology, to form integrated circuit chips having power handling devices combined with logic and analog circuit functions. Multi-output power devices can be manufactured on the same silicon die with each power DMOS device totally insulated. Both the drain and the source of the DMOS devices are located on the top side of the silicon die.
A smart power circuit which combines the use of DMOS devices with high voltage NPN and CMOS control logic circuitry is beneficial to the integrated circuit art. Furthermore, such a smart power circuit which could provide a DMOS power transistor which is as rugged if not more rugged than existing DMOS power structures would make such integrated circuit further beneficial.